Sponsored
Digital VLSI Design and Simulation with Verilog - by Suman Lata Tripathi & Sobhit Saxena & Sanjeet K Sinha & Govind S Patel (Hardcover)
About this item
Highlights
- Master digital design with VLSI and Verilog using this up-to-date and comprehensive resource from leaders in the field Digital VLSI Design Problems and Solution with Verilog delivers an expertly crafted treatment of the fundamental concepts of digital design and digital design verification with Verilog HDL.
- About the Author: Suman Lata Tripathi is Professor of VLSI Design at Lovely Professional University, India.
- 224 Pages
- Technology, Electronics
Description
About the Book
"The integrated circuits are now growing its importance in every electronic system that needs an efficient VLSI architecture designs with low power consumption, compress chip area, speed, and operating frequency. The challenge for VLSI system designers is to optimize the hardware-software integration for lowering the total cost of acquisition of products. So, there is a demand for better technological solutions for advanced VLSI architectures that can be done through hardware description language (HDL). Verilog HDL is one of the programming languages that can give better solutions to this new era of the VLSI industry. The prefabrication design and analysis of such advanced VLSI architecture can be easily implemented with Verilog HDL with the available software tools like Xilinx and Cadence. The presented book mainly deals with fundamental concepts of digital design along with their design verification with Verilog HDL. The book will be a common source of knowledge for the beginners as well as research seeking students working in the area of VLSI design covering fundamentals of digital design from switch level to FPGA based implementation using hardware description language (HDL). The book is summarized in 10 chapters. Chapter 1 and 2 describes the fundamental concepts behind digital circuit design including combinational and sequential circuit design. Chapter 3 to chapter 8 is focused on sequential and combinational circuit design using Verilog HDL at a different level of abstractions in Verilog coding. Chapter 9 includes implementation of any logic function using a programmable logic device like PLD, CPLD or FPGA, etc. Chapter 10 covers a few real-time examples of digital circuit design using Verilog. Chapter 11 focuses on System Verilog, distinct features, computing Verilog and System Verilog with design example."--Book Synopsis
Master digital design with VLSI and Verilog using this up-to-date and comprehensive resource from leaders in the field
Digital VLSI Design Problems and Solution with Verilog delivers an expertly crafted treatment of the fundamental concepts of digital design and digital design verification with Verilog HDL. The book includes the foundational knowledge that is crucial for beginners to grasp, along with more advanced coverage suitable for research students working in the area of VLSI design. Including digital design information from the switch level to FPGA-based implementation using hardware description language (HDL), the distinguished authors have created a one-stop resource for anyone in the field of VLSI design.
Through eleven insightful chapters, you�ll learn the concepts behind digital circuit design, including combinational and sequential circuit design fundamentals based on Boolean algebra. You�ll also discover comprehensive treatments of topics like logic functionality of complex digital circuits with Verilog, using software simulators like ISim of Xilinx. The distinguished authors have included additional topics as well, like:
Perfect for undergraduate and graduate students in electronics engineering and computer science engineering, Digital VLSI Design Problems and Solution with Verilogalso has a place on the bookshelves of academic researchers and private industry professionals in these fields.
From the Back Cover
Master digital design with VLSI and Verilog using this up-to-date and comprehensive resource from leaders in the field
Digital VLSI Design and Simulation with Verilog delivers an expertly crafted treatment of the fundamental concepts of digital design and digital design verification with Verilog HDL. The book includes foundational knowledge that is crucial for beginners to grasp, along with more advanced coverage suitable for research students working in the area of VLSI design. Including digital design from switch level to FPGA-based implementation using hardware description language (HDL), this is a one-stop resource for anyone in the field of VLSI design and also features:
- A discussion of programming techniques in Verilog, including gate level modeling, model instantiation, dataflow modeling, and behavioral modeling
Perfect for undergraduate and graduate students in electronics and computer engineering, Digital VLSI Design and Simulation with Verilog also has a place on the bookshelves of academic researchers and industry professionals.
About the Author
Suman Lata Tripathi is Professor of VLSI Design at Lovely Professional University, India. She is a senior member of the IEEE and received her PhD in microelectronics and VLSI Design from Motilal Nehru National Institute of Technology, Allahabad, India.
Sobhit Saxena is Associate Professor of VLSI Design at Lovely Professional University, India. He received his PhD from IIT Roorkee, India.
Sanjeet K. Sinha, PhD, is Associate Professor of VLSI Design at Lovely Professional University, India. He received his PhD from the National Institute of Technology, Silchar, India.
Govind S. Patel, PhD, is Professor of VLSI Design at IIMT College of Engineering, Greater Noida, UP, India. He received his doctorate from Thapar University in Patiala, India.