Embedded Microprocessor System Design Using FPGAs - by Uwe Meyer-Baese (Paperback)

Book Synopsis

This textbook for courses in Embedded Systems introduces students to necessary concepts, through a hands-on approach. It gives a great introduction to FPGA-based microprocessor system design using state-of-the-art boards, tools, and microprocessors from Altera/Intel(R) and Xilinx(R). HDL-based designs (soft-core), parameterized cores (Nios II and MicroBlaze), and ARM Cortex-A9 design are discussed, compared and explored using many hand-on designs projects. Custom IP for HDMI coder, Floating-point operations, and FFT bit-swap are developed, implemented, tested and speed-up is measured. Downloadable files include all design examples such as basic processor synthesizable code for Xilinx and Altera tools for PicoBlaze, MicroBlaze, Nios II and ARMv7 architectures in VHDL and Verilog code, as well as the custom IP projects. Each Chapter has a substantial number of short quiz questions, exercises, and challenging projects.

• Explains soft, parameterized, and hard core systems design tradeoffs;
• Demonstrates design of popular KCPSM6 8 Bit microprocessor step-by-step;
• Discusses the 32 Bit ARM Cortex-A9 and a basic processor is synthesized;
• Covers design flows for both FPGA Market leaders Nios II Altera/Intel and MicroBlaze Xilinx system;
• Describes Compiler-Compiler Tool development;
• Includes a substantial number of Homework's and FPGA exercises and design projects in each chapter.

From the Back Cover

This textbook for courses in Embedded Systems introduces students to necessary concepts, through a hands-on approach. It gives a great introduction to FPGA-based microprocessor system design using state-of-the-art boards, tools, and microprocessors from Altera/Intel(R) and Xilinx(R). HDL-based designs (soft-core), parameterized cores (Nios II and MicroBlaze), and ARM Cortex-A9 design are discussed, compared and explored using many hand-on designs projects. Custom IP for HDMI coder, Floating-point operations, and FFT bit-swap are developed, implemented, tested and speed-up is measured. Downloadable files include all design examples such as basic processor synthesizable code for Xilinx and Altera tools for PicoBlaze, MicroBlaze, Nios II and ARMv7 architectures in VHDL and Verilog code, as well as the custom IP projects. Each Chapter has a substantial number of short quiz questions, exercises, and challenging projects.

• Explains soft, parameterized, and hard core systems design tradeoffs;
• Demonstrates design of popular KCPSM6 8 Bit microprocessor step-by-step;
• Discusses the 32 Bit ARM Cortex-A9 and a basic processor is synthesized;
• Covers design flows for both FPGA Market leaders Nios II Altera/Intel and MicroBlaze Xilinx system;
• Describes Compiler-Compiler Tool development;
• Includes a substantial number of Homework's and FPGA exercises and design projects in each chapter.

About the Author

Dr. Uwe Meyer-Baese received his BSEE, MSEE, and Ph.D. "Summa cum Laude" from the Darmstadt University of Technology in 1987, 1989, and 1995, respectively. He is now a Full Professor in the ECE Department at Florida State University. He holds 3 patents, has published over 130 journal and conference papers, 9 books, and supervised more than 60 master and Ph.D. thesis projects in the real-time DSP/FPGA area. In 2003, he was awarded the "Habilitation" (venia legendi) by the Darmstadt University of Technology. He is PI and CO-PI of projects valued more than 9 million USD. His research is funded by NIH, NSF, FSU, DOD, Harris, SUN microsystems, Altera, Xilinx and the State of Florida. He is author of the best-selling textbook on DSP with FPGAs by Springer Verlag sold over 20K copies. He received in 1997 the Max-Kade Award in Neuroengineering, the Outstanding Teaching Award from Florida State University in 2008, the Best Presentation Award from SPIE in 2006, Who's Who in Science member in2005, and the Humboldt Research Award in 2009. Dr. Meyer-Baese has been promoted by the Institute of Electrical and Electronics Engineers (IEEE) to Senior Member status in 2013.